Agilent 16517A, 16518A Synchronous State Logic Analyzer by PDF

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Extra info for Agilent 16517A, 16518A Synchronous State Logic Analyzer (users)

Sample text

Fine adjustments are in 50 ps increments. Example Your valid data appears 150 ps after the rising edge of the external clock, so offset the sample point by 150 ps. Offsetting the External Clock 3–7 The Format Menu Pod Threshold Field Pod Threshold Field The pod threshold field is used to set a voltage level which the data must cross before the analyzer recognizes and displays it as a change in logic levels. You specify a threshold level for each pod. The level specified for the master pod, which includes the clock, is also assigned to the clock.

Fine adjustments are in 50 ps increments. Example Your valid data appears 150 ps after the rising edge of the external clock, so offset the sample point by 150 ps. Offsetting the External Clock 3–7 The Format Menu Pod Threshold Field Pod Threshold Field The pod threshold field is used to set a voltage level which the data must cross before the analyzer recognizes and displays it as a change in logic levels. You specify a threshold level for each pod. The level specified for the master pod, which includes the clock, is also assigned to the clock.

Find setup or hold violation This macro becomes true when there is a change on a selected group of channels which violates the specified setup or hold time criteria with respect to a selected edge. It uses two internal sequence levels. 2. Find setup or hold violation clocked by an edge within a valid pattern This macro becomes true when either a designated setup or a hold criterion is violated on a selected group of channels which are being clocked by a selected edge which appears within a designated pattern.

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Agilent 16517A, 16518A Synchronous State Logic Analyzer (users)


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